Hello,
I am try using VTune Profiler on FreeBSD target and got next errors:
# /opt/intel/bin64/vtune -collect hotspots -knob sampling-mode=hw /bin/ls
vtune: Warning: On some systems based on the Intel microarchitecture code name Nehalem / Westmere with C-states enabled, this analysis type may cause system hanging due to a known hardware issue (see errata AAJ134 in http://download.intel.com/design/processor/specupdt/320836.pdf). To avoid this situation, disable all "Cn(ACPI Cn) report to OS" BIOS options before sampling with VTune Profiler on such systems.
***ERROR: could not retrieve time stamp!
ERROR: CPU_CLK_UNHALTED.REF_P is not a valid event multiplexing trigger
ERROR: Success
ERROR: Success
ERROR: Success
ERROR: There are no valid events specified - Sampling aborted
Run parameters are not valid - Aborting sampling run ...
Options error
vtune: Error: ***ERROR: could not retrieve time stamp!
ERROR: CPU_CLK_UNHALTED.REF_P is not a valid event multiplexing trigger
ERROR: Success
ERROR: Success
ERROR: Success
ERROR: There are no valid events specified - Sampling aborted
Run parameters are not valid - Aborting sampling run ...
Options error
vtune: Collection failed.
vtune: Internal Error
What is a problem? How to resolve this?
My CPU is Intel(R) Xeon(R) CPU X5675 @ 3.07GHz (3066.83-MHz K8-class CPU)
# /opt/intel/bin64/sep -platform-info
***ERROR: could not retrieve time stamp!
Sampling Enabling Product version: 5.14 built on Nov 26 2019 11:01:27
SEP User Mode Version: 5.14
SEP Driver Version: 5.14.3
PAX Driver Version: 1.0.2
Copyright(C) 2007-2019 Intel Corporation. All rights reserved.
total_number_of_processors ...... 12
cpu_family ................ Intel(R) Xeon(R) Processor 980X series code named Westmere
cpu_model ................. 44 (0x2c)
cpu_stepping .............. 2 (0x2)
L1 Data Cache ............. 32KB, 8-way, 64-byte line size
2 HW threads share this cache, No SW Init Required
L1 Code Cache ............. 32KB, 4-way, 64-byte line size
2 HW threads share this cache, No SW Init Required
L2 Unified Cache .......... 256KB, 8-way, 64-byte line size
2 HW threads share this cache, No SW Init Required
L3 Unified Cache .......... 12MB, 16-way, 64-byte line size
No SW Init Required
Data TLB0 ................. 4-way, 2M/4M Pages, 32 entries
Data TLB .................. 4-way, 4K Pages, 64 entries
Instruction TLB ........... fully, 2M/4M Pages, 7 entries
Instruction TLB ........... 4-way, 4K Pages, 64 entries
64-byte Prefetching
Shared 2nd Level TLB ...... 4-way, 4K Pages, 512 entries
Device Type ............... Intel(R) Xeon(R) Processor 980X series code named Westmere
EMON Database ............. corei7wdp
number_of_selectors ....... 4
number_of_var_counters .... 4
number_of_fixed_ctrs....... 3
Fixed Counter Events:
counter 0 ................. INST_RETIRED.ANY
counter 1 ................. CPU_CLK_UNHALTED.THREAD
counter 2 ................. CPU_CLK_UNHALTED.REF
number of devices ......... 1
number_of_events .......... 788
Processor Features:
(Thermal Throttling) (Enabled)
(Hyper-Threading) (Enabled)
(Number of Packages: 1)
(Cores Per Package: 6)
(Threads Per Package: 12)
(Threads Per Core: 2)
TSC Freq .................. TBD MHz
CPU Freq (detected) ....... 3067.00 MHz